Course Title:
Digital Hardware Synthesis
Course Description:
Introduces techniques and tools for the automatic synthesis of digital systems. Focuses on algorithms for translating a high-level specification into an implementation. Covers a brief introduction to hardware description languages (HDL), automatic translation of the HDL to an intermediate format, architectural synthesis of the register transfer-level implementation, automatic state machine synthesis, and logic synthesis. Requires a completed research project in the automatic synthesis of digital designs.
Fall Offering:
Lab/Coreq 1:
Spring Offering:
Lab/Coreq 2:
Summer Offering:
Lab/Coreq Remarks:
Summer 1 Offering:
Prerequisite 1:
ECE G205
Summer 2 Offering:
Prerequisite 2:
Cross-Listed Course 1:
Prerequisite 3:
Cross-Listed Course 2:
Prerequisite 4:
Cross-Listed Course 3:
Prerequisite 5:
Cross-Listed Course 4:
Prerequisite Remarks:
Cross-Listed Course 5:
Repeatable:
N
