Course Number:

Credit Hours:

4

Course Title:

Digital Systems Design and Interfacing with Verilog

Course Description:

Covers automated design and synthesis of digital systems with the standard Verilog hardware description language, with an emphasis on CPU structures and interfacing. Demonstrates how Verilog can be used for simulation, synthesis, and test of digital systems. Discusses hardware description using predefined parts, using the bussing structure of a system, or using a mapping of inputs to outputs. After a complete presentation of the Verilog language, presents synthesizability concepts and templates for logic unit, memory unit, and state machine synthesis. Continues by using Verilog in a complete design and description of a CPU, its peripheral devices, and generation of a complete CPU board.