Course Title:
Hardware Description Languages and Synthesis
Course Description:
Focuses on modeling of digital systems in a hardware description language. Topics include textual vs. graphical modeling of digital systems, syntax and semantics of the VHDL language, modeling for simulation, and modeling for synthesis. Students use a commercially available CAD tool to simulate and synthesize digital system descriptions.
Fall Offering:
Odd
Lab/Coreq 1:
Spring Offering:
Lab/Coreq 2:
Summer Offering:
Lab/Coreq Remarks:
Summer 1 Offering:
Prerequisite 1:
ECE U322
Summer 2 Offering:
Prerequisite 2:
Cross-Listed Course 1:
Prerequisite 3:
Cross-Listed Course 2:
Prerequisite 4:
Cross-Listed Course 3:
Prerequisite 5:
Cross-Listed Course 4:
Prerequisite Remarks:
Cross-Listed Course 5:
Repeatable:
N